1. Field of the Invention
The present invention relates to an image memory system using a solid-state memory as a recording medium of an image signal.
2. Related Background Art
A solid-state camera using, for instance, a memory cartridge as an apparatus to record an image signal by using a solid-state memory is been known.
A construction to improve the serial copying speed in such a solid-state camera has been disclosed in JP-A-56-126387 (Kokai). FIG. 6 shows a block diagram of the construction of a system similar to the system disclosed in the above Official Gazette.
In FIG. 6, reference numeral 10 denotes a photographing lens; 12 indicates a solid-state image pickup unit; 14 an analog image processing circuit; 16 an A/D converter; 18 a latch circuit; 20a, 20b, 20c, 20d, 20e, 20f, 20g, and 20h parallel/serial (P/S) converters each for converting a 8-bit parallel signal into a serial signal; 22 a memory cartridge having eight memory packs 22a, 22b, 22c, 22d, 22e, 22f, 22g, and 22h comprising semiconductor memories as memory devices; and 23 a clock circuit.
The image pickup unit 12 converts an image of an object which was photographed by the photographing lens 10 into an electric signal. The analog image processing circuit 14 executes well-known analog image processes to an output of the image pickup unit 12. The A/D converter 16 converts a signal of one pixel of an output of the analog image processing circuit 14 into an 8-bit digital signal. The 8-bit data is latched into the latch circuit 18 and is sequentially supplied every pixel to the P/S converters 20a to 20h. In this case, the latch circuit 18 comprises 8 bits.times.8 latch elements and circulatively supplies the pixel data to the P/S converters 20a to 20h every pixel in a manner such that the first pixel data is supplied to the P/S converter 20a, the second pixel data is supplied to the P/S converter 20b, and the like.
The P/S converters 20a to 20h convert the 8-bit parallel signals into the serial signals. The serial outputs are stored into the corresponding memory packs 22a to 22h, respectively.
With the above construction, as compared with the case where all of the pixel data are stored into one memory pack, they can be recorded in the time of 1/8 of that in the above case and the recording time can be reduced. In other words, the serial copy speed can be raised. Generally, if N memory packs and N P/S converters are provided and the latch circuit 18 is constructed by 8 bits.times.N latch elements, the recording time can be reduced into 1/N.
However, in the above conventional example, since one image is distributed and stored into a plurality of memory packs 22a to 22h in the memory cartridge 22, there is a drawback such that if all of the memory packs are not provided, the recorded image cannot be reproduced. On the other hand, there is a problem such that in order to reduce the recording time, many P/S converters and many latch elements are needed and the circuit is complicated.